This application note describes the controller and data capture technique for high-perform……
The purpose of this white paper is to describe how Spartan®-6 FPGAs address the needs ……
利用基础 LUT 的可重编程性作为移位寄存器或 SelectRAM™ 存储器，以及快速进位逻辑链，灵活的 CAM（内容可寻址存储器）在 Virtex™ 器件……
This application note describes the implementation of a parameterizable LocalLink FIFO, wh……
The block memories in the Virtex®-II architecture are capable of supporting data bus w……
The Virtex®-II FPGA series provides dedicated on-chip blocks of 18 Kbit True Dual-Port……
The shift registers available in Virtex®-II devices are ideal when building synchronou……
This application note describes the transformation of multiple synchronous serial data str……
The Virtex® FPGA series provides dedicated on-chip blocks of 4096 bit dual-port synchr……
Product specification for FIFO Generator v2.2.
fifo_generator.pdf……
